System in Package (SIP) Market by Technology (2D, 2.5D & 3D), by Type (BGA, SMT, QFP, SOP), Interconnection Technology (Flip-Chip & Wire-bond), Applications (Communications, Consumer, Automotive, Medical)& Geography - Global Trends & Forec

NEW YORK, June 16, 2014 — (PRNewswire) — announces that a new market research report is available in its catalogue:

System in Package (SIP) Market by Technology (2D, 2.5D & 3D), by Type (BGA, SMT, QFP, SOP), Interconnection Technology (Flip-Chip & Wire-bond), Applications (Communications, Consumer, Automotive, Medical)& Geography - Global Trends & Forecasts 2014 - 2020

The ever-increasing demands for miniaturization and higher functionality at less cost processes have driven the development of stacked ICs and System in Package (SiP) technologies. System in Package (SiP) is a single reduced functional module realized by the horizontal tiling or vertical stacking of two or more similar or dissimilar bare die or packaged chips. Taking the chips nearer enables the highest level of silicon integration and area efficiency at the lowest cost, compared to mounting them separately in traditional ways. In doing so, the electrical pathway length between chips is reduced, leading to a higher performance.

System on Package (SOP) is an emerging trend in the system miniaturization technology in divergence to System-on-Chip (SOC) at IC level and System in Package (SiP) at module level. System in Package (SiP) is obtained by thinning ICs from its original 800 micron thick wafer dimensions to 50 microns and stacking as many as 10 of these, one on top of the other, in 3D form. These are then interconnected by either wire bond or flip-chip technology. The current Through Silicon via (TSV) developments have further condensed System in Package (SiP) by replacing flip chip with pad to pad bonding.

The capability to integrate different technologies and to reduce total production cost and time to market are the prime drivers for System in Package (SiP) packaging. System in Package (SiP) has enabled the rapid integration of active and passive devices into single package solutions. This approach has also reduced product costs, allowing systems to be partitioned into the most cost-effective blocks. The stacked System in Package (SiP) alignments reduce the system size and eliminate the cost of individual packages for each die. They also improve signal transmission times and reduced power by minimizing capacitive loads between ICs.

The rapid expansion of the System in Package (SiP) market has inspired research and development in System in Package (SiP) associated technology by Integrated Device Manufacturers (IDM) as well as Electronic Manufacturing Services (EMS) providers and Semiconductor Assembly Services (SAS). With this evolution of System in Package (SiP) technology during the last few decades, the future trend for System in Package (SiP) technology in the next decade or two will be clearer if we look at the future electronics market sectors such as mobile products, high-end computers, automobiles, flat-panel High-Definition TVs (HDTVs), and sensors for security, health care, and environment. The consumer mobile products will advance to more multi functionality, thus, realizing the digital convergent dream with flexible displays with LED as a light source, thin film, or nano batteries.

Some of the key players in this market include Amkor Technology (U.S.), ASE Global (Taiwan), Powertech Technology (Taiwan), STATS ChipPAC (Singapore), ChipMOS Technologies (Taiwan), Siliconware Precision Industries Co., Ltd. (Taiwan), InsightSiP (France), Freescale Semiconductor Inc. (U.S.), Wi2Wi Inc.(U.S.), and Nanium S.A. (Portugal), among others.

Table of Contents

1 Introduction (Page No. - 21)
1.1 Key Objectives
1.2 Report Description
1.3 Markets Covered
1.4 Stakeholders
1.5 Research Methodology
1.5.1 Market Size Estimation
1.5.2 Market Crackdown &Data Triangulation
1.5.3 Key Points Taken From Secondary Sources
1.5.4 Key Points Taken From Primary Sources
1.5.5 List of Companies Covered During Study
1.6 Report Assumptions

2 Executive Summary (Page No. - 35)

3 Market Overview (Page No. - 39)
3.1 Introduction
3.2 History & Evolution of SIP
3.2.1 Soc (System on Chip)
3.2.2 Mcm (Multi Chip Module)
3.2.3 SIP (System in Package)
3.2.4 Soc Vs. SIP
3.3 Emerging Trends
3.3.1 System on Package (SOP)
3.3.2 Photonics Convergence for Interchip Interconnects

4 Market Analysis (Page No. - 49)
4.1 Introduction
4.2 System in Package (SIP) Industry Value Chain Analysis
4.3 Market Dynamics
4.3.1 Introduction
4.3.2 Market Drivers Increasing Demand for Miniaturized & High Performance Electronic Devices Strong Penetration in Consumer Electronics Sector to Drive the SIP Market Faster Time-to-Market and Lower Development Costs Acts As An Attractive Prospect for the Electronic Manufacturers
4.3.3 Market Restraints 'Known Good Die'– Big Challenge for SIP (System in Package) Reliability Challenges
4.3.4 Opportunity Rapid Adoption of Smartphone & Tablets in Emerging Countries
4.4 Burning Issue
4.4.1 Lack of Industry Infrastructure
4.5 Winning Imperative
4.5.1 Need of thermal Management for Packaged Chips
4.6 Porter's Five forces Model
4.6.1 Degree of Competition
4.6.2 Bargaining Power of Buyers
4.6.3 Bargaining Power of Suppliers
4.6.4 Threat From Substitutes
4.6.5 Threat From New Entrants

5 Global System in Package (SIP) Market Segmentation (Page No. - 69)
5.1 Introduction
5.2 System in Package (SIP) – By Packaging Technology
5.2.1 2D Ic Packaging Technology
5.2.2 2.5D Ic Packaging Technology Major Benefits of 2.5D Ic Packaging Over the Traditional 2D Packaging Practices
5.2.3 3D Ic Packaging Technology
5.2.4 2D Vs. 2.5D Vs. 3D Ic Packaging Technology
5.3 System in Package (SIP) – By Packaging Type
5.3.1 Ball Grid Array Pbga (Plastic Ball Grid Array) Sbga (Super Ball Grid Array) Fbga (Fine Pitch Ball Grid Array) Fcbga (Flip Chip Ball Grid Array) Others
5.3.2 Surface Mount Package Lga (Land Grid Array) Ccga (Ceramic Column Grid Array) Others
5.3.3 Pin Grid Array (Pga) Flip Chip Pin Grid Array (FCPGA) Ceramic Pin Grid Array (CPGA) Others
5.3.4 Flat Packages Qfn (Quad Flat No-Leads) Utqfn (Ultra Thin Quad Flat No-Leads) Others
5.3.5 Small Outline Package Tsop(Thin Small Outline Package) Tssop (Thin Shrink Small Outline Package) Others
5.4 System in Package (SIP) – By interconnection Technology
5.4.1 Wire Bond Technology
5.4.2 Flip Chip Technology Advantages of Flip Chip Technology Over the Traditional Interconnection Technology:
5.4.3 Others

6 Market By Application (Page No. - 106)
6.1 Introduction
6.2 Consumer Electronics Sector
6.2.1 Smartphone & Tablets
6.2.2 Portable Media Players
6.2.3 Set-top Boxes & Digital Tvs
6.2.4 Dvd & Blu-Ray Players
6.2.5 Others
6.3 Communications Sector
6.3.1 Network Processors
6.3.2 Wireless Communication Equipment
6.3.3 Others
6.4 Automotive & Transportation Sector
6.4.1 Automotive Radar
6.4.2 Automotive Smart Sensors
6.4.3 Automotive Local Interconnect Network (LIN)
6.4.4 Others
6.5 Industrial Sector
6.5.1 Industrial Wireless Sensor Networks (IWSN)
6.5.2 Industrial Automation Devices
6.5.3 Others
6.6 Military, Defense & Aerospace (MDA) Sector
6.6.1 Radar Equipment
6.6.2 Satellite Communication Devices
6.6.3 Others
6.7 Medical Sector
6.7.1 Patient Monitoring Devices
6.7.2 Medical Smart Sensor System
6.7.3 Others
6.8 Emerging & Other Applications Sector

7 Market By Geography (Page No. - 146)
7.1 Introduction
7.2 North America
7.2.1 U.S.
7.2.2 Canada
7.3 APAC
7.3.1 Japan
7.3.2 Taiwan
7.3.3 China
7.3.4 Others
7.4 Europe
7.4.1 U.K.
7.4.2 Germany
7.4.3 France
7.4.4 Others
7.5 Rest of The World
7.5.1 Middle East
7.5.2 Russia
7.5.3 Others

8 Competitive Landscape (Page No. - 172)
8.1 Overview
8.2 Competitive Analysis
8.2.1 Market Share Ranking Analysis
8.3 Competitive Situation &Trends
8.3.1 New Product Launch, New Product Development&Expansion
8.3.2 Agreements, Partnerships, Joint Ventures, & Collaborations
8.3.3 Mergers &Acquisitions
8.3.4 Other Developments

9 Company Profiles (Overview, Products and Services, Financials, Strategy & Development)* (Page No. - 191)
9.1 Amkor Technology Inc.

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