Aldec unveils the newest Xilinx Zynq-based TySOM Embedded Prototyping Board at Embedded Vision Summit 2017

Santa Clara, USA. – May 1, 2017 – Aldec, in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, unveils the new Xilinx® Zynq®-based  TySOM™-2A-7Z030 Embedded Prototyping Board at  Embedded Vision Summit to be held May 1-3, 2017, in Santa Clara, California. The latest TySOM Embedded Prototyping Board serves embedded designers who require a high-performance configurable SoC in a small form-factor for Embedded Vision, IoT, UAV, and Automotive applications.

 The TySOM-2A-7Z030 is designed to ensure flexibility in selecting peripherals by leveraging the largest chip package (FFG676) with 250 I/O and 4 GTX transceivers, as well as by hosting an onboard FMC-HPC connector which enables the use of industry standard  FMC Daughter Cards for extensibility. The board features a combination of memories (1 GB DDR3, SPI flash memory, EEPROM, uSD), communication interfaces (2× Gigabit Ethernet, 4× USB 2.0, UART-via-USB, Wi-Fi, Bluetooth, HDMI 1.4), and other miscellaneous modules (LEDs, DIP switches, XADC, RTC, accelerometer, temperature sensor). 

“The partnership between Xilinx and Aldec was further strengthened this year as Aldec brought their broad EDA industry background into the embedded system world by introducing the TySOM family of embedded development boards based on the Xilinx Zynq SoC,” said Mark Jensen, director of strategic market development, Embedded Systems, Xilinx. “We are looking forward to seeing our partnership further demonstrated at Embedded Vision with demos featuring Zynq UltraScale™ MPSoC and Xilinx’s new reVISION™ stack for vision guided machine learning applications.” 

“The complete TySOM product line with FMC daughter cards and professional reference designs targeting Embedded Vision, IoT, and Software Defined Radio will be showcased at Embedded Vision Summit 2017,” said Zibi Zalewski, general manager hardware division, Aldec. “Our Zynq boards, together with reference designs, include easy-to-follow tutorials, providing the ideal embedded development platform with a clear path to production.”

 Visitors to Aldec’s Booth at Embedded Vision Summit 2017 will have the opportunity to view the following embedded vision demos running on the TySOM-2-7Z100 and TySOM-2A-7Z030 boards in addition to Aldec’s latest solution for the end-to-end HW/SW co-verification flows using QEMU and Riviera-PRO: 

ADAS Multi-Camera Surround View reference design based on TySOM-2-7Z100 EDK + FMC-ADAS + FMC-Vision. The reference design captures, processes, and displays 4 simultaneous First Sensor® Blue Eagle™ camera video streams in real-time. In order to achieve the goal for real-time processing performance, the most computationally intensive parts of the code are off-loaded from the ARM® Cortex®-A9 to the FPGA part of the Zynq device using Xilinx SDSoC™ development environment. The accelerated portion includes edge detection, color space conversion, and frame merging tasks.q 

Face Detection reference design based on TySOM-2A-7Z030 EDK + FMC-ADAS. Real time streaming video @1280x720, 30fps captured by an HDR-CMOS image sensor and processed by a Xilinx Zynq-7000 SoC FPGA which contains a high performance dual-core ARM Cortex-A9 processing system with FPGA fabric. In order to achieve real-time processing performance, the most computationally intensive parts of the code are off-loaded from ARM Cortex-A9 to the FPGA part of Zynq device using Xilinx’s SDSoC™ tool. The accelerated part includes edge detection, color space conversion, and frame merging tasks. 

QEMU flow for HW/SW Co-simulation reference design based on MIPI CSI-2 HDL core. The application running on Linux on QEMU ARM-Cortex A-9 stimulates the MIPI CSI-2 HDL core running in  Riviera-PRO™ through the Aldec QEMU Bridge and AXI BFM. Sample HW/SW breakpoints are inserted so that concurrent debugging is enabled using GDB debugger and Riviera-PRO. 

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, Requirements Lifecycle Management, Embedded, DO-254 Functional Verification and Military/Aerospace solutions.

Review Article Be the first to review this article

Featured Video
Latest Blog Posts
Sanjay GangalMCADCafe Lens
by Sanjay Gangal
NVIDIA GTC October 2020 Keynote
Design Engineer - Tilt Up and Bracing for Commercial Metals Company at Dallas, Texas
Service Software Expert-CATIA & CAA for Dassault Systemes at Shanghai, China
Product Design Engineer - Softgoods for Apple Inc at Cupertino, California
Director, Industrial Machinery Solutions- SISW PLM for Siemens AG at Livonia, Michigan
Detailing/ PM Manager for Commercial Metals Company at Dallas, Texas
Electrical Engineer for Lockheed Martin at Liverpool, New York
Upcoming Events
PLM Road Map & PDT Spring 2021 at 3909 Research Park Drive Ann Arbor MI - May 19 - 20, 2021
TCT ASIA 2021 at National Exhibition and Convention Centre(NECC) Shanghai China - May 26 - 28, 2021
RAPID + TCT at McCormick Place Chicago IL - Sep 13 - 15, 2021
WESTEC Online at Online CA - Sep 21 - 23, 2021
Kenesto: 30 day trial

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise