Linley Spring Processor Conference 2019: eSilicon to demonstrate 7nm DSP SerDes over a 5-meter cable assembly and present on IP platforms

SAN JOSE, Calif., April 02, 2019 (GLOBE NEWSWIRE) -- eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, will demonstrate its 7nm FinFET-class SerDes IP at the Linley Spring Processor Conference 2019. eSilicon will also present Opposites Attract: Customizing and Standardizing IP Platforms for ASIC Differentiation. Registration for the event is open until 5:00 PM PDT on April 4.  Linley Spring Processor Conference 2019: eSilicon to demonstrate 7nm DSP SerDes over a 5-meter cable assembly and present on IP platforms 

What
N7 SerDes Demonstrations
Wednesday, April 10, 4:45-6:15

Conference Reception
Using Samtec ExaMAX backplane connector paddle cards and a five-meter ExaMAX backplane cable assembly, eSilicon will demonstrate the performance, flexibility and extremely low power consumption of its  7nm, 56G PAM4 and NRZ DSP-based long-reach SerDes.

The demonstration will drive four high-speed SerDes lanes in three configurations with point-to-point links:

  • CPRI NRZ modulation
  • 50G Ethernet PAM4 modulation
  • 56 Gbps PAM4 modulation

Real-time data associated with all channels will be displayed to demonstrate the robustness and low power of the device:

  • Voltage histograms, pre- and post-DSP
  • Signal-to-noise ratio (SNR)
  • Equalization
  • Eye diagrams
  • Bit error rate (BER) monitor

What
Presentations and Panel Discussion
Thursday, April 11, 1:15-2:45

Session 5: SoC Design
Carlos Macian, senior director AI strategy and products will present:
Opposites Attract: Customizing and Standardizing IP Platforms for ASIC Differentiation
IP are fundamental building blocks of modern ASICs, often providing a competitive edge in spite of their standard nature. And yet, true differentiation and optimization mandates IP customization for the specific product needs. The challenge is how to combine standardization and ease of integration for an accelerated and predictable schedule with the need to optimize the IP. We will explore an approach to this problem using best-in-class, silicon-proven IP that is also designed for ease of integration and application-specific customization.

Arteris IP and SiFive will also present during this session. Q&A and a panel discussion featuring the speakers will follow the presentations.

About the Linley Spring Processor Conference
Hyatt Regency Santa Clara
Santa Clara, Calif., USA
The  Linley Spring Processor Conference 2019 is the only one of its kind focused on the processors and IP cores used in deep learning, embedded, communications, IoT, and server designs. 

About e Silicon
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, AI and 5G infrastructure markets. www.esilicon.com

Collaborate. Differentiate. Win.™

eSilicon is a registered trademark, and the eSilicon logo, neuASIC and “Collaborate. Differentiate. Win.” are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

Contacts: 
Sally SlemonsNanette Collins
eSilicon CorporationPublic Relations for eSilicon
Email Contact Email Contact

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