Binary Format Speeds Waveform Loading
WaveViewer v11.0 can save waveforms to SynaptiCAD's proprietary compressed waveform format, BTIM. The BTIM format is typically about 200x smaller than an equivalent VCD file and loads 500x faster on subsequent reloads of the waveform data. The compression algorithms operate on both analog and digital data.
Faster Simulations with Direct BTIM Waveform Dumping
The new viewer also includes a PLI application that can directly generate BTIM files from Verilog and VHDL simulators. By directly dumping to BTIM, simulations can be speeded up by 3x compared to dumping to a VCD file. The BTIM PLI library supports the following simulators: SynaptiCAD VeriLogger Pro, Mentor Graphics ModelSim, Aldec ActiveHDL, Cadence Incisive, and Synopsys VCS.
Selectively Load Signals With Filter Files
The updated viewer offers the ability to create "filter files" for selectively loading signals from a waveform file and reordering the signals. Filter files allow users to see only the waveforms they want to see, without having to select and reorder them every time they run a new simulation. Filter files also allow properties to be attached to the waveforms that are not supported in the native format being imported into WaveViewer (for example, voltage levels can be attached to signals loaded from a VCD file).
Other new features include:
- A new Show and Hide dialog that makes it simple to control which signals are visible or hidden in the diagram. Select signals either graphically or with regular expression pattern matches
- Faster rendering of dense digital waveforms
- Improved rendering of analog data
- An improved dialog for inspecting the time and states of individual edges in a waveform
- A new quick-start tutorial that covers both basic operation and several advanced features of the viewer
The WaveViewer program is free of charge and is currently available on Windows ME/NT/2000/XP, Linux, Solaris, and HPUX. Optional commercial add-ons include GigaWave capability ($1000), waveform comparison ($1000), and a PSL assertion engine ($1000). SynaptiCAD also offers a complete line of timing diagram editors, VHDL and Verilog test bench generation, and Verilog simulation products. For more information, contact SynaptiCAD at phone (800)804-7073 or (540)953-3390, fax (540)953-3078, email: Email Contact, web www.syncad.com
For any questions concerning this press release please contact Donna Mitchell at 540-953-3390 or email at Email Contact. High resolution images can be downloaded directly from SynaptiCAD's web site at www.syncad.com.