Synopsys' DesignWare Verification IP Enhanced to Support New SATA 6Gbps Specification

Verification IP Enables Faster Testbench Development for Mass Storage SoC Designs

MOUNTAIN VIEW, Calif., June 18 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that its leading DesignWare(R) SATA Verification IP now supports SATA 6Gbps transfer rates as defined in the draft Serial ATA International Organization: Serial ATA Revision 3.0 specification. The third generation of the SATA specification doubles the data transfer rate of the 2.6 specification from 3Gbps to 6Gbps, enabling designers to take advantage of the increased throughput rates to move large amounts of data, such as high resolution photos, videos and music. Designers who want to implement a SATA 6Gbps interface can now use DesignWare Verification IP to significantly speed testbench development time and quickly verify their mass storage system-on-chip (SoC) designs.

The DesignWare Verification IP supports all major simulators and verification languages including Verilog, SystemVerilog, VHDL and Vera, allowing designers to quickly and efficiently create a comprehensive SATA- based environment. In addition, the Verification IP for SATA delivers up to 5X performance improvement when used with Synopsys' VCS(R) simulation tool. Synopsys' comprehensive solution also includes the silicon-proven DesignWare digital controllers and PHY IP for SATA, providing designers with access to a complete SATA solution from a single IP vendor.

"Verification IP plays a critical role in lowering the testbench development time and cost by reducing the need to create a verification environment from the ground up," said John Koeter, senior director of marketing for IP and Systems at Synopsys. "The DesignWare Verification IP with support for 6Gbps enables designers to quickly take advantage of the latest specifications, while lowering integration risk and speeding their product development time."


The DesignWare Verification IP for SATA with support for 6Gbps is available today as a standalone product, both in the DesignWare Library and VCS Verification Library. For more information, please visit

About DesignWare IP

Synopsys offers a broad portfolio of high-quality, silicon-proven digital, mixed-signal and verification IP for system-on-chip designs. As a leading provider of connectivity IP, Synopsys delivers the industry's most complete solutions for widely used protocols such as USB, PCI Express, SATA, Ethernet and DDR. In addition to connectivity IP, Synopsys offers SystemC transaction level models to build virtual platforms for rapid, pre-silicon development of software. When combined with a robust IP development methodology, extensive investment in quality and comprehensive technical support, DesignWare IP enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to- silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at

Synopsys, DesignWare and VCS are registered trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

     Editorial Contact:

     Yvette Huygen
     Synopsys, Inc.

     Ellen Van Etten

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