360 MV’s New RootCauseAnalyzer™ Speeds Assertion and Design Debug by up to 10x

MUNICH, Germany and SUNNYVALE, Calif. – July 15, 2009 – OneSpin Solutions ­ provider of 360™  MV, the most comprehensive formal assertion-based verification (ABV) solution ­ today announced its new RootCauseAnalyzer™ that boosts formal ABV productivity by making SystemVerilog assertion (SVA) and RTL design debug much easier and faster. An integral part of OneSpin’s 360 MV solution, the RootCauseAnalyzer provides the most advanced debug automation capabilities available in formal ABV tools today. It eliminates most of the time-consuming, error-prone manual analysis of complex information otherwise necessary to trace the root causes of assertion failures, speeding assertion and design debug by up to 10x.

OneSpin’s RootCauseAnalyzer consists of four tightly integrated debug components. These constitute a unique debug flow that automates the tracing of assertion failures back to their root cause ­ incorrect assertion code, missing constraints, or a bug in the RTL source code. RootCauseAnalyzer components include:

WaveformAnalyzer – Displays diagnostic information to speed analysis of counterexamples that show the assertion failure. StructuralAssertionAnalyzer – An SVA code debugger that automatically pinpoints the failing parts of an assertion; it indicates where to start assertion debug, and identifies the signals and clock cycles involved in the failure. It provides source code value annotations for all assertion objects – including objects in referenced named sequences, and properties – during all relevant clock cycles of the counterexample. Thus it also enables efficient debugging of assertions that are described hierarchically to ease assertion coding, understanding and reuse.  TemporalFaninAnalyzer – Automates the tracing of signals involved in the assertion failure to related design signals, thus automating exploration of signal dependencies across clock cycles. ActiveCodeAnalyzer – Marks the RTL source code regions involved in the assertion failure and automates exploration of these code regions across clock cycles, focusing and speeding RTL source code debug.

OneSpin’s CEO Peter Feist said, “Assertion and design debugging consumes about 30 to 40 percent of the overall verification effort. Using our new RootCauseAnalyzer, engineers can leverage the full capabilities of SVA to verify increasingly complex situations efficiently. They gain further productivity and quality improvements by lifting mainstream assertion use to higher levels, such as the efficient capture and verification of specification-level design features, operations, and transactions. Advanced debugging automation is key to this progress – solving a problem that engineers face in their daily work.”

OneSpin will demonstrate the new RootCauseAnalyzer in Booth #3465 at the Design Automation Conference at the Moscone Center in San Francisco, July 27-30. OneSpin also will present two tutorials – one specifically tailored to formal ABV newcomers, and one for advanced users. In addition, OneSpin will participate in the DAC Special Session: “ The tool shows that my design is wrong – but where is the bug?” on Thursday July 30, 9-11 a.m., in Room 133.

Availability

The RootCauseAnalyzer is available this month’s release of OneSpin’s 360 MV.

About 360 MV

OneSpin’s 360 MV product family – the most comprehensive formal ABV solution available today – significantly accelerates a wide range of RTL verification and analysis tasks. It covers the full spectrum of formal ABV applications – from early automatic RTL analysis all the way to highest-quality GapFreeVerification™ using SVA – enabling step-by-step learning that makes new users productive in days. 360 MV accelerates verification tasks by up to 10x compared to simulation, and enables engineers to achieve a design quality that cannot be ensured by any other verification approach.

About OneSpin Solutions

Electronic Design Automation (EDA) company OneSpin Solutions delivers innovative, highest capacity formal verification solutions for the mainstream that ease and speed the functional verification of complex ASIC and FPGA designs. Market-leading telecommunications, automotive, consumer electronics, and embedded systems companies rely on OneSpin's award-winning products to substantially reduce verification effort and achieve highest possible verification quality. For further information please visit http://www.onespin-solutions.com/ or email info@onespin-solutions.com.

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